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P-CHANNEL 30V - 0.012 - 10A SO-8 STripFETTM II POWER MOSFET Table 1: General Features TYPE STS10PF30L STS10PF30L Figure 1:Package RDS(on) <0.014 ID 10 A VDSS 30V TYPICAL RDS(on) = 0.012 STANDARDOUTLINEFOR EASY AUTOMATED SURFACE MOUNT ASSEMBLY LOW THRESHOLD DRIVE DESCRIPTION This Power MOSFET is the latest development of STMicroelectronis unique "Single Feature SizeTM" strip-based process. The resulting transistor shows extremely high packing density for low onresistance. APPLICATIONS BATTERY MANAGEMENT IN NOMADIC EQUIPMENT LOAD SWITCH SO-8 Figure 2: Internal Schematic Diagram Table 2: Order Codes SALES TYPE STS10PF30L MARKING S10PF30L PACKAGE SO-8 PACKAGING TAPE & REEL Table 3: ABSOLUTE MAXIMUM RATING Symbol VDS VDGR VGS ID ID IDM(*) Ptot Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Value 30 30 16 10 6 40 2.5 Unit V V V A A A W Note: For the P-CHANNEL MOSFET actual polarity of voltages and current has to be reversed May 2005 Rev. 2.0 1/9 STS10PF30L Table 4: THERMAL DATA Rthj-amb Rthj-lead Tl Tstg (*) Thermal Resistance Junction-ambient Thermal Resistance Junction-leads Maximum Lead Temperature For Soldering Purpose storage temperature Max Max Typ 47 16 150 -55 to 150 C/W C/W C C (*) When Mounted on 1 inch2 FR-4 board, 2 oz of Cu and t bA10 sec. ELECTRICAL CHARACTERISTICS (Tcase = 25 C unless otherwise specified) Table 5: OFF Symbol V(BR)DSS IDSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating TC = 125C VGS = 16 V Min. 30 1 10 100 Typ. Max. Unit V A A nA IGSS Table 6: ON (*) Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS VGS = 10 V VGS = 4.5 V ID = 250 A ID = 5 A ID = 5 A Min. 1 0.012 0.015 0.014 0.018 Typ. Max. Unit V Table 7: DYNAMIC Symbol gfs Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS = 10 V ID = 5 A Min. Typ. 31 2300 750 115 Max. Unit S pF pF pF VDS = 25V, f = 1 MHz, VGS = 0 2/9 STS10PF30L ELECTRICAL CHARACTERISTICS (continued) Table 8: SWITCHING ON Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 15 V ID = 5 A VGS = 4.5 V RG = 4.7 (Resistive Load, Figure 15) VDD= 15V ID= 10A VGS=4.5V (see test circuit, Figure 16) Min. Typ. 72 87 29 6.8 7.6 39 Max. Unit ns ns nC nC nC Table 9: SWITCHING OFF Symbol td(off) tf Parameter Turn-off Delay Time Fall Time Test Conditions VDD = 15 V ID = 5 A VGS = 4.5 V RG = 4.7, (Resistive Load, Figure 15) Min. Typ. 89 27 Max. Unit ns ns Table 10: SOURCE DRAIN DIODE Symbol ISD ISDM VSD (*) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 10 A VGS = 0 48.5 68 2.8 Test Conditions Min. Typ. Max. 10 40 1.2 Unit A A V ns nC A ISD = 10 A di/dt = 100A/s Tj = 150C VDD = 15 V (see test circuit, Figure 17) (*) Pulse width b 300 s, duty cycle 1.5 %. (*) Pulse width limited by TJMAX Figure 3: Safe Operating Area Figure 4: Thermal Impedance 3/9 STS10PF30L Figure 5: Output Characteristics Figure 6: Transfer Characteristics Figure 7: Transconductance Figure 8: Static Drain-source On Resistance Figure 9: Gate Charge vs Gate-source Voltage Figure 10: Capacitance Variations 4/9 STS10PF30L Figure 11: Normalized Gate Threshold Voltage vs Temperature Figure 12: Normalized on Resistance vs Temperature Figure 13: Source-drain Diode Forward Characteristics Figure 14: Normalized Breakdown Voltage vs Temperature. . . 5/9 STS10PF30L Fig. 15: Switching Times Test Circuits For Resistive Load Fig. 16: Gate Charge test Circuit Fig. 17: Test Circuit For Diode Recovery Behaviour 6/9 STS10PF30L SO-8 MECHANICAL DATA DIM. MIN. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 3.8 0.4 4.8 5.8 1.27 3.81 4.0 1.27 0.6 8 (max.) 0.14 0.015 5.0 6.2 0.65 0.35 0.19 0.25 0.1 mm TYP. MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. inch TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019 0016023 7/9 STS10PF30L Table 11:Revision History Date May 2005 Revision 2.0 completed whit curves Description of Changes 8/9 STS10PF30L Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics All other names are the property of their respective owners. (c) 2005 STMicroelectronics - All Rights Reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco -Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America. www.st.com 9/9 |
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